6 Board Design Recommendations

This chapter discusses board-level implementation details of a PCIe design using the PolarFire family of devices. Optimal performance requires understanding the functionality of the device pins and properly addressing issues such as device interfacing, protocol specifications, and signal integrity.

For more information, see respective PolarFire FPGA Board Design User Guide, RT PolarFire Board Design User Guide, or PolarFire SoC FPGA Board Design Guidelines User Guide.

Various specifications from PCI-SIG apply depending on the form factor of the design. This chapter focuses on a subset of these specifications centered on chip-to-chip and add-in card implementations.

For more information, see the PCI Express Base Specification, Revision 2.0 and PCI Express Card Electromechanical Specification (CEM) Revision 2.0 from PCI-SIG.