14.5.4.3.1 OP[7:0] Register

OP[7:0] is an 8-bit register that stores an operation code to select which operation the target device performs when it processes DATA commands. The host updates the value of the OP[7:0] register with CMDE commands. Supported operations are listed in the table below.
Note: Operation codes listed in the table below are not the low-level Flash Commands at SEFC level. These are high-level commands within the FFPI Monitor.
OP[7:0]OperationDescription
0x00SYNCNo operation
0x11READRead Pages
0x12WPWrite Pages
0x21USRPUser Signature Read Pages
0x22WPLWrite Pages then Lock Pages
0x32EWPErase Block then Write Pages
0x42EWPLErase Block, Write Pages then Lock Pages
0x14SLBSet Lock Bit
0x24CLBClear Lock Bit
0x34SGBSet GPNVM Bit
0x44CGBClear GPNVM Bit
0x52USWPUser Signature Write Pages
0x54SSBSet SECURITY Bit
0x62USEWPUser Signature Erase Block then Write Pages
0x15GLBGet Lock Bit
0x25GGBGet GPNVM Bit
0x35GSBGet SECURITY Bit
0x06SFBSelect Flash Bank
0x1EVERSIONRead FFPI Monitor Version
0x1FWRAMWrite into RAM
0x2FRRAMRead from RAM
0x3FJRAMJump in RAM