16.4.2.2 NRST External Reset Control

The RSTC can be configured to assert the external reset line (NRST). The NRST pin is driven low for a time programmed by RSTC_MR.ERSTL. This assertion duration lasts 2^(ERSTL+1) MD_SLCK cycles. This assertion duration time in range 60 μs to 2 seconds. If ERSTL=0 , a two slow clock period duration is generated on the NRST pin.

This feature allows the NRST line to be compliant with any external devices connected on the system reset (i.e., when external devices require a longer start-up time than the processor system).

If WDTx_MR.WDNRST_DIS = 0, the NRST pin is asserted in case of a Watchdog reset.

If WDTx_MR.WDNRST_DIS = 1, the NRST pin is not asserted in case of a Watchdog reset.