51.6.2.1.5 Relation Between MCKn, SCKn, and Sampling Frequency fs

Based on sampling frequency fs, the SCKn frequency requirement can be calculated:
  • SCKn frequency: f SCKn = f s × total_number_of_bits_per_frame ,
  • Where total_number_of_bits_per_frame = number_of_slots × number_of_bits_per_slots .
  • The number of slots is selected by writing to the Number of Slots in Frame bit field in the Clock Unit n Control (CLKCTRLn) register: number_of_slots = NBSLOTS + 1 .
  • The number of bits per slot (8, 16, 24, or 32 bit) is selected by writing to the Slot Size bit field in CLKCTRLn: number_of_bits_per_slot = 8 × ( SLOTSIZE + 1 ) .
  • Consequently, f SCKn = 8 × f s × ( NBSLOTS + 1 ) × ( SLOTSIZE + 1 ) .
The clock frequencies f SCKn and f MCKn are derived from the generic clock frequency f GCLK_I2S_n :
  • f GCLK_I2S_n = f SCKn × ( CLKCTRLn.MCKDIV + 1 ) = 8 × f s × ( NBSLOTS + 1 ) × ( SLOTSIZE + 1 ) × ( MCKDIV + 1 )
    , and
  • f GCLK_I2S_n = f MCKn × ( MCKOUTDIV + 1 ) .

Substituting the right hand sides of the two last equations yields:

f MCKn = f GCLK_I2S_n MCKOUTDIV + 1
f MCKn = 8 f s ( SLOTSIZE + 1 ) ( NBSLOTS + 1 ) ( MCKDIV + 1 ) MCKOUTDIV + 1

If a Host Clock output is not required, the GCLK_I2S generic clock can be configured as SCKn by writing a '0'to CLKCTRLn.MCKDIV. Alternatively, if the frequency of the generic clock is a multiple of the required SCKn frequency, the MCKn-to-SCKn divider can be used with the ratio defined by writing the CLKCTRLn.MCKDIV field.

The FSn pin is used as Word Select in I2S format and as Frame Synchronization in TDM format, as described in I2S Format - Reception and Transmission Sequence with Word Select and TDM Format - Reception and Transmission Sequence, respectively.