31.5 ADCGxE
Note:
Refer to the “Pin Allocation Table” for details about available pins per port.
Name: | ADCGxE |
Offset: | 0x1D32 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CGE2 | CGE1 | CGE0 | |||||||
Access | R/W | R/W | R/W | ||||||
Reset | 0 | 0 | 0 |
Name: | ADCGxE |
Offset: | 0x1D32 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CGE2 | CGE1 | CGE0 | |||||||
Access | R/W | R/W | R/W | ||||||
Reset | 0 | 0 | 0 |
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.