46.9.1 SSC Control Register

Name: SSC_CR
Offset: 0x0
Reset: 
Property: Write-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
 SWRST     TXDISTXEN 
Access WWW 
Reset  
Bit 76543210 
       RXDISRXEN 
Access WW 
Reset  

Bit 15 – SWRST Software Reset

ValueDescription
0

No effect.

1

Performs a software reset. Has priority on any other bit in SSC_CR.

Bit 9 – TXDIS Transmit Disable

ValueDescription
0

No effect.

1

Disables Transmit. If a character is currently being transmitted, disables at end of current character transmission.

Bit 8 – TXEN Transmit Enable

ValueDescription
0

No effect.

1

Enables Transmit if TXDIS is not set.

Bit 1 – RXDIS Receive Disable

ValueDescription
0

No effect.

1

Disables Receive. If a character is currently being received, disables at end of current character reception.

Bit 0 – RXEN Receive Enable

ValueDescription
0

No effect.

1

Enables Receive if RXDIS is not set.