74.6.2.1 Output Driver AC Characteristics

The timing definitions necessary to specify the maximum operating frequency of an output driver are provided in the following figure.

Figure 74-8. Timing Definitions of a Digital Output Signal

tSIG: Period of the digital output signal

f = 1 / tSIG: Frequency of the digital output signal

tHIGH: Time during which the output waveform is greater than VDD / 2

tLOW = tSIG - tHIGH: Time during which the output waveform is less than VDD / 2

d = tHIGH / tSIG: Output waveform duty cycle

VO: Output waveform amplitude

In Table 74-21 and Table 74-22, the maximum operating frequency fMAX ensures that the driver’s output waveform fulfills the following characteristics:
  • tR < 0.75 / fMAX and tF < 0.75 / fMAX
  • d: the duty cycle of the output waveform is between 45% and 55%
  • VO: the output waveform amplitude is greater than 95% VDD

The fMAX parameter indicates the speed limit of an output driver across various operating conditions: supply voltage range, load capacitance, drive strength programming. The effective maximum output frequency of a specific output line may be limited by the peripheral that drives this line. Conversely, higher output switching speeds may be achieved under different load conditions. Microchip recommends to perform an electrical simulation of the critical interfaces (GMAC, SDMMC, QSPI, etc.) with the provided IBIS models.

Table 74-21 and Table 74-22 provide the AC output characteristics of the output drivers in the following conditions:
  • Output load: 10 pF capacitor to ground
  • Two VDD ranges:
    • 1.7V < VDD < 1.9V and
    • 3.0V < VDD < 3.6V
  • Two Drive settings: 0 and 1, and
  • Two Slewrate settings for the GPIO type: 0 and 1.

For the GPIO drivers, the following table provides the recommended drive and slewrate settings depending on the output switching frequency and the two commonly used VDD ranges (1.8V and 3.3V). Other settings are possible but they may lead to excessively fast rise and fall times (tR, tF), with a potentially negative impact on the electromagnetic emissions of the application.

Table 74-19. Recommended GPIO Drive and Slewrate Settings vs IO Use Case
VDD Range Low Speed

fGPIO ≤  50 MHz(1)

High Speed

50 MHz ≤  fGPIO ≤  170 MHz(1)

1.7V - 1.9V Drive = 1, Slewrate = 1 Drive = 1, Slewrate = 0
3.0V - 3.6V Drive = 0, Slewrate = 1 Drive = 0, Slewrate = 0
Note:
  1. This is an indicative value. See Table 74-21 and Table 74-22 for accurate maximum frequency specifications.

For the HSIO drivers (used in SDMMCx and QSPI0 peripherals), the following table provides their nominal output impedance with respect to the Drive settings. These drivers do not have a Slewrate setting but are rather calibrated against an external 1% resistor mounted on the SDMMCx_CAL or QSPI0_CAL pins. Depending on the target signal frequency and the external load, it is possible adjust their target output impedance.

Table 74-20. HSIO Output Impedance vs Drive Settings
VDD Range Drive = 00 (Type D) Drive = 01 (Type A) Drive = 10 (Type C) Drive = 11 (Type B) Unit
1.7V – 1.9V(1) 100 33 66 50 Ω
3.0V – 3.6V(2) 84 28 56 42 Ω
Note:
  1. For SDMMC lines in UHS I mode in 1.8V, the drive is controlled in the SDMMC user interface. In this case, drive configurations in PIO registers have no effect.
  2. In the 3.3V range, only the Drive = 00 (Type D) settings are recommended. Other configurations may lead to excessively fast rise and fall times. Microchip provides IBIS models to perform an electrical simulation of these QSPI an SDMMC interfaces.
Table 74-21. Output Driver AC Characteristics (1.7V < VDD < 1.9V, CL = 10 pF)
Symbol Parameter I/O Type Conditions Min Max Unit
tR or tF Rise or fall time(1)(2) GPIO Drive = 0, Slewrate = 0 1.5 5.1 ns
Drive = 1, Slewrate = 0 1.4 4.8 ns
Drive = 0, Slewrate = 1 4.1 12.3 ns
Drive = 1, Slewrate = 1 2.1 7.0 ns
HSIO Drive = 11 (Type B) 1.6 1.8 ns
Drive = 01 (Type A) 1.1 1.25 ns
Drive = 10 (Type C) 2.2 2.3 ns
Drive = 00 (Type D) 3.3 3.4 ns
PIOBU 1.0 4.0 ns
fMAX Maximum frequency(2)(3) GPIO Drive = 0, Slewrate = 0 95 MHz
Drive = 1, Slewrate = 0 135 MHz
Drive = 0, Slewrate = 1 25 MHz
Drive = 1, Slewrate = 1 50 MHz
HSIO Drive = 11 (Type B) 125 MHz
Drive = 01 (Type A)(4) 150 MHz
Drive = 10 (Type C) 100 MHz
Drive = 00 (Type D) 70 MHz
PIOBU 25 MHz
Note:
  1. Measured between VO = 10% VDD and VO= 90% VDD
  2. Simulation data
  3. fMAX may be limited by the peripheral that drives the I/O line.
  4. 200 MHz operation can be achieved with different load conditions. It is recommended to perform an electrical simulation with the provided IBIS models.
Table 74-22. Output Driver AC Characteristics (3.0V < VDD < 3.6V, CL = 10 pF)
Symbol Parameter I/O Type Conditions Min Max Unit
tR or tF Rise or fall time(1)(2) GPIO Drive = 0, Slewrate = 0 1.5 2.9 ns
Drive = 1, Slewrate = 0 1.4 2.7 ns
Drive = 0, Slewrate = 1 4.0 7.0 ns
Drive = 1, Slewrate = 1 2.2 4.0 ns
HSIO Drive = 11 (Type B) 1.3 1.5 ns
Drive = 01 (Type A) 0.9 1.0 ns
Drive = 10 (Type C) 1.7 1.9 ns
Drive = 00 (Type D) 2.6 2.9 ns
PIOBU 1.0 3.0 ns
fMAX Maximum frequency(2)(3) GPIO Drive = 0, Slewrate = 0 150 MHz
Drive = 1, Slewrate = 0 170 MHz
Drive = 0, Slewrate = 1 50 MHz
Drive = 1, Slewrate = 1 75 MHz
HSIO Drive = 11 (Type B) 125 MHz
Drive = 01 (Type A) 150 MHz
Drive = 10 (Type C) 100 MHz
Drive = 00 (Type D) 70 MHz
PIOBU 40 MHz
Note:
  1. Measured between VO = 10% VDD and VO= 90% VDD
  2. Simulation data
  3. fMAX may be limited by the peripheral that drives the I/O line.