24.3 Register Summary


Offset	Name	Bit Pos.	7	6	5	4	3	2	1	0
0x1B00	CCP1CON1	31:24	OPSSRC	RTRGEN			OPS[3:0]
		23:16	TRIGEN	ONESHOT	ALTSYNC	SYNC[4:0]
		15:8	ON		SIDL	SLPEN	TMRSYNC	CLKSEL[2:0]
		7:0	TMRPS[1:0]		T32	CCSEL	MOD[3:0]
0x1B04	CCP1CON2	31:24	OENSYNC							OCAEN
		23:16	ICGSM[1:0]			AUXOUT[1:0]		ICS[2:0]
		15:8	PWMRSEN	ASDGM		SSDG
		7:0	ASDG[7:0]
0x1B08	CCP1CON3	31:24	OETRIG	OSCNT[2:0]
		23:16			POLACE		PSSACE[1:0]
		15:8
		7:0
0x1B0C	CCP1STAT	31:24
		23:16				PRLWIP	TMRHWIP	TMRLWIP	RBWIP	RAWIP
		15:8						ICGARM
		7:0	CCPTRIG	TRSET	TRCLR	ASEVT	SCEVT	ICDIS	ICOV	ICBNE
0x1B10	CCP1TMR	31:24	TMR[31:24]
		23:16	TMR[23:16]
		15:8	TMR[15:8]
		7:0	TMR[7:0]
0x1B14	CCP1PR	31:24	PR[31:24]
		23:16	PR[23:16]
		15:8	PR[15:8]
		7:0	PR[7:0]
0x1B18	CCP1RA	31:24
		23:16
		15:8	CMPA[15:8]
		7:0	CMPA[7:0]
0x1B1C	CCP1RB	31:24
		23:16
		15:8	CMPB[15:8]
		7:0	CMPB[7:0]
0x1B20	CCP1BUF	31:24	BUF[31:24]
		23:16	BUF[23:16]
		15:8	BUF[15:8]
		7:0	BUF[7:0]
0x1B24 ... 0x1B2F	Reserved
0x1B30	CCP2CON1	31:24	OPSSRC	RTRGEN			OPS[3:0]
		23:16	TRIGEN	ONESHOT	ALTSYNC	SYNC[4:0]
		15:8	ON		SIDL	SLPEN	TMRSYNC	CLKSEL[2:0]
		7:0	TMRPS[1:0]		T32	CCSEL	MOD[3:0]
0x1B34	CCP2CON2	31:24	OENSYNC							OCAEN
		23:16	ICGSM[1:0]			AUXOUT[1:0]		ICS[2:0]
		15:8	PWMRSEN	ASDGM		SSDG
		7:0	ASDG[7:0]
0x1B38	CCP2CON3	31:24	OETRIG	OSCNT[2:0]
		23:16			POLACE		PSSACE[1:0]
		15:8
		7:0
0x1B3C	CCP2STAT	31:24
		23:16				PRLWIP	TMRHWIP	TMRLWIP	RBWIP	RAWIP
		15:8						ICGARM
		7:0	CCPTRIG	TRSET	TRCLR	ASEVT	SCEVT	ICDIS	ICOV	ICBNE
0x1B40	CCP2TMR	31:24	TMR[31:24]
		23:16	TMR[23:16]
		15:8	TMR[15:8]
		7:0	TMR[7:0]
0x1B44	CCP2PR	31:24	PR[31:24]
		23:16	PR[23:16]
		15:8	PR[15:8]
		7:0	PR[7:0]
0x1B48	CCP2RA	31:24
		23:16
		15:8	CMPA[15:8]
		7:0	CMPA[7:0]
0x1B4C	CCP2RB	31:24
		23:16
		15:8	CMPB[15:8]
		7:0	CMPB[7:0]
0x1B50	CCP2BUF	31:24	BUF[31:24]
		23:16	BUF[23:16]
		15:8	BUF[15:8]
		7:0	BUF[7:0]
0x1B54 ... 0x1B5F	Reserved
0x1B60	CCP3CON1	31:24	OPSSRC	RTRGEN			OPS[3:0]
		23:16	TRIGEN	ONESHOT	ALTSYNC	SYNC[4:0]
		15:8	ON		SIDL	SLPEN	TMRSYNC	CLKSEL[2:0]
		7:0	TMRPS[1:0]		T32	CCSEL	MOD[3:0]
0x1B64	CCP3CON2	31:24	OENSYNC							OCAEN
		23:16	ICGSM[1:0]			AUXOUT[1:0]		ICS[2:0]
		15:8	PWMRSEN	ASDGM		SSDG
		7:0	ASDG[7:0]
0x1B68	CCP3CON3	31:24	OETRIG	OSCNT[2:0]
		23:16			POLACE		PSSACE[1:0]
		15:8
		7:0
0x1B6C	CCP3STAT	31:24
		23:16				PRLWIP	TMRHWIP	TMRLWIP	RBWIP	RAWIP
		15:8						ICGARM
		7:0	CCPTRIG	TRSET	TRCLR	ASEVT	SCEVT	ICDIS	ICOV	ICBNE
0x1B70	CCP3TMR	31:24	TMR[31:24]
		23:16	TMR[23:16]
		15:8	TMR[15:8]
		7:0	TMR[7:0]
0x1B74	CCP3PR	31:24	PR[31:24]
		23:16	PR[23:16]
		15:8	PR[15:8]
		7:0	PR[7:0]
0x1B78	CCP3RA	31:24
		23:16
		15:8	CMPA[15:8]
		7:0	CMPA[7:0]
0x1B7C	CCP3RB	31:24
		23:16
		15:8	CMPB[15:8]
		7:0	CMPB[7:0]
0x1B80	CCP3BUF	31:24	BUF[31:24]
		23:16	BUF[23:16]
		15:8	BUF[15:8]
		7:0	BUF[7:0]
0x1B84 ... 0x1B8F	Reserved
0x1B90	CCP4CON1	31:24	OPSSRC	RTRGEN			OPS[3:0]
		23:16	TRIGEN	ONESHOT	ALTSYNC	SYNC[4:0]
		15:8	ON		SIDL	SLPEN	TMRSYNC	CLKSEL[2:0]
		7:0	TMRPS[1:0]		T32	CCSEL	MOD[3:0]
0x1B94	CCP4CON2	31:24	OENSYNC							OCAEN
		23:16	ICGSM[1:0]			AUXOUT[1:0]		ICS[2:0]
		15:8	PWMRSEN	ASDGM		SSDG
		7:0	ASDG[7:0]
0x1B98	CCP4CON3	31:24	OETRIG	OSCNT[2:0]
		23:16			POLACE		PSSACE[1:0]
		15:8
		7:0
0x1B9C	CCP4STAT	31:24
		23:16				PRLWIP	TMRHWIP	TMRLWIP	RBWIP	RAWIP
		15:8						ICGARM
		7:0	CCPTRIG	TRSET	TRCLR	ASEVT	SCEVT	ICDIS	ICOV	ICBNE
0x1BA0	CCP4TMR	31:24	TMR[31:24]
		23:16	TMR[23:16]
		15:8	TMR[15:8]
		7:0	TMR[7:0]
0x1BA4	CCP4PR	31:24	PR[31:24]
		23:16	PR[23:16]
		15:8	PR[15:8]
		7:0	PR[7:0]
0x1BA8	CCP4RA	31:24
		23:16
		15:8	CMPA[15:8]
		7:0	CMPA[7:0]
0x1BAC	CCP4RB	31:24
		23:16
		15:8	CMPB[15:8]
		7:0	CMPB[7:0]
0x1BB0	CCP4BUF	31:24	BUF[31:24]
		23:16	BUF[23:16]
		15:8	BUF[15:8]
		7:0	BUF[7:0]