18.6.1 Interrupt Watermarks

Both TX and RX interrupt frequency can be configured using the watermark setting. For transmit, the TXWM[2:0] bits setting allows the TX interrupt frequency to be based on the number of empty slots left in the TX buffer (UxTXB). When the transmitter is initially enabled (TXEN = 1), the TX interrupt bit will be set on the condition that the module is enabled (ON = 1) as well. The user should clear the TX interrupt bit in the ISR. For receive, the RXWM[2:0] bits setting allows the RX interrupt frequency to be based on how many bytes are in the RX buffer (UxRXB). By default, an RX interrupt will be generated when the RX buffer has at least one byte in it. The receive watermark interrupt will not be set if PERIF, FERIF, or TXCIF are set and the corresponding PERIE, FERIE or TXCIE bits are set.