24.10.1 TxTMR
| Name: | TxTMR |
| Offset: | 0x038C,0x0392 |
Timer Counter Register
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TxTMR[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Name: | TxTMR |
| Offset: | 0x038C,0x0392 |
Timer Counter Register
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TxTMR[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
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