19.6 Configuring the CRC Module
The following steps illustrate how to properly configure the CRC:
- Determine if the automatic
program memory scan will be used with the scanner or manual calculation through
the SFR interface and perform the actions specified in the CRC Data Sources
section.
- To configure the scanner module to be used with CRC, refer to the “Configuring the Scanner” section for more information.
- When applicable, seed a starting CRC value into the CRCOUT registers.
- Program the CRCXOR registers with the desired generator polynomial.
- Program the DLEN bits with the length of the data word (refer to Figure 19-1). This value determines how many times the shifter will shift into the accumulator for each data word.
- Program the PLEN bits with the length of the polynomial (refer to Figure 19-1).
- Determine whether shifting in trailing zeroes is desired and set the ACCM bit accordingly.
- Determine whether the MSb or LSb first shifting is desired, and write the SHIFTM bit accordingly.
- Set the GO bit to begin the shifting process.
- If manual SFR entry is used,
monitor the FULL bit.
- When FULL =
0
, another word of data can be written to the CRCDATA registers. It is important to note that the Most Significant Byte (CRCDATAH) must be written first if the data has more than eight bits, as the shifter will begin upon the CRCDATAL register being written. - If the scanner is used, the scanner will automatically load words into the CRCDATA registers as needed, as long as the GO bit is set.
- When FULL =
- If using the Flash memory
scanner, monitor the SCANIF bit of the corresponding PIR register to determine
when the scanner has finished pushing data into the CRCDATA registers.
- After the scan is completed, monitor the SGO bit to determine that the CRC has been completed and the check value can be read from the CRCOUT registers.
- When both the interrupt flags are set (or both BUSY and SGO bits are cleared), the completed CRC calculation can be read from the CRCOUT registers.
- If manual entry is used, monitor the BUSY bit to determine when the CRCOUT registers hold the valid check value.