19.14.1 CRCCON0
| Name: | CRCCON0 |
| Offset: | 0x1CA2 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| EN | GO | BUSY | ACCM | SETUP[1:0] | SHIFTM | FULL | |||
| Access | R/W | R/W | R | R/W | R/W | R/W | R | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
Bit 7 – EN CRC Enable
| Value | Description |
|---|---|
| 1 | CRC module is released from Reset |
| 0 | CRC is disabled and consumes no operating current |
Bit 6 – GO CRC Start
| Value | Description |
|---|---|
| 1 | Start CRC serial shifter |
| 0 | CRC serial shifter turned off |
Bit 5 – BUSY CRC Busy
| Value | Description |
|---|---|
| 1 | Shifting in progress or pending |
| 0 | All
valid bits in shifter have been shifted into accumulator and EMPTY =
1 |
Bit 4 – ACCM Accumulator Mode
| Value | Description |
|---|---|
| 1 | Data are augmented with zeros |
| 0 | Data are not augmented with zeros |
Bits 4:3 – SETUP[1:0]
| Value | Description |
|---|---|
| 11 | CRC Register Overlay Selection; Read / Write access to CRCOUT |
| 10 | CRC Register Overlay Selection; Read / Write access to CRCXOR |
| 01 | CRC Register Overlay Selection; Read / Write access to CRCSHIFT |
| 00 | CRC Register Overlay Selection; Read / Write access to CRCOUT |
Bit 1 – SHIFTM Shift Mode
| Value | Description |
|---|---|
| 1 | Shift right (LSb first) |
| 0 | Shift left (MSb first) |
Bit 0 – FULL Data Path Full Indicator
| Value | Description |
|---|---|
| 1 | CRCDATAT/U/H/L registers are full |
| 0 | CRCDATAT/U/H/L registers have shifted their data into the shifter |