27.5.4 AHBMUX Arbitration
The AHBMUX arbitrates concurrent AHB0, AHB1 and SmartEEPROM accesses using a fixed priority scheme:
- AHB0 has the highest priority
- AHB1 has priority over SmartEEPROM
- SmartEEPROM has priority over AHB2
However, once a transfer has been accepted the AHB data phase must complete, meaning that a transaction can be stalled by a previously granted access with a lower priority. This can occur in Automatic Wait State mode or in Fixed Wait State mode when the Wait state is greater than zero.
AHBMUX does not re-arbitrate AHB burst transactions. This is useful in case of concurrent write transfers to the page buffer. If used in conjunction with the automatic write features (ADW, AQW, APW) and if the burst transfer size is a multiple of the automatic write size, several hosts can write the NVM without implementing any software semaphore checks.
It is possible to force the re-arbitration in case of burst transfers, as follows:
- on AHB0: by writing a ‘1’ to CTRLA.AHBNS0
- on AHB1: by writing a ‘1’ to CTRLA.AHBNS1