27.5.14 Chip Erase

The chip erase operation is system-wide and issued through the DSU.

The chip erase procedure is as follows:

  1. Volatile memories are cleared and NVM array is erased (except the auxiliary rows and the BOOTPROT section).
  2. Special individual fuses are set:
    • If BOOTPROT section is not defined, then NVMCTRL STATUS.AFIRST = 1 otherwise it is left unchanged
    • NVMCTRL SEESTAT.ASEES = 1
    • NVMCTRL SEESTAT.LOCK = 0
    • DSU STATUSB.CELCK = 0
  3. The Security bit is cleared provided no internal error has been detected in the previous steps:
    • If all internal NVM verify operations succeeded, go to Step 4.
    • Otherwise set DSU STATUSA.DONE and DSU STATUSA.FAIL, and then exit.
  4. DSU STATUSB.PROT is cleared, and the system is no more protected.
Note: The CB, FS, USER pages (in the auxiliary address space) and the BOOTPROT section are not affected by the chip-erase operation.