45.7.19 Pattern Buffer

Note: This register is write-synchronized: SYNCBUSY.PATT must be checked to ensure the PATT register synchronization is complete.
Name: PATTBUF
Offset: 0x64
Reset: 0x0000
Property: Write-Synchronized

Bit 15141312111098 
 PGVB7PGVB6PGVB5PGVB4PGVB3PGVB2PGVB1PGVB0 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 PGEB7PGEB6PGEB5PGEB4PGEB3PGEB2PGEB1PGEB0 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 8, 9, 10, 11, 12, 13, 14, 15 – PGVB Pattern Generation Output Value Buffer

This register is the buffer for the PGV register. If double buffering is used, valid content in this register is copied to the PGV register on an UPDATE condition.

Bits 0, 1, 2, 3, 4, 5, 6, 7 – PGEB Pattern Generation Output Enable Buffer

This register is the buffer of the PGE register. If double buffering is used, valid content in this register is copied into the PGE register at an UPDATE condition.