37.5.9 I2CxCLK

I2C Clock Selection Register
Name: I2CxCLK
Offset: 0x029E

Bit 76543210 
    CLK[4:0] 
Access R/WR/WR/WR/WR/W 
Reset 00000 

Bits 4:0 – CLK[4:0] I2C Clock Selection

Table 37-4. 
CLKSelection
11000-11111Reserved
10111CLC8_out
10110CLC7_out
10101CLC6_out
10100CLC5_out
10011CLC4_out
10010CLC3_out
10001CLC2_out
10000CLC1_out
01111SMT1 overflow
01100-01110Reserved
01011TU16B_out
01010TU16A_out
01001TMR6 post scaled output
01000TMR4 post scaled output
00111TMR2 post scaled output
00110TMR0 overflow
00101EXTOSC
00100Clock Reference output
00011MFINTOSC (500 kHz)
00010HFINTOSC
00001FOSC
00000FOSC/4