16.1 DMA Registers

The operation of the DMA module is controlled by the following registers:

  • DMA Instance Selection (DMASELECT) register
  • Control (DMAnCON0, DMAnCON1) registers
  • Data Buffer (DMAnBUF) register
  • Source Start Address (DMAnSSA) register
  • Source Pointer (DMAnSPTR) register
  • Source Message Size (DMAnSSZ) register
  • Source Count (DMAnSCNT) register
  • Destination Start Address (DMAnDSA) register
  • Destination Pointer (DMAnDPTR) register
  • Destination Message Size (DMAnDSZ) register
  • Destination Count (DMAnDCNT) register
  • Start Interrupt Request Source (DMAnSIRQ) register
  • Abort Interrupt Request Source (DMAnAIRQ) register

The registers are detailed in Register Definitions: DMA.