13.4.3 External Interrupt Flag Register

Name: EIFR
Offset: 0x14
Reset: 0x00
Property: -

Bit 76543210 
        INTF0 
Access R/W 
Reset 0 

Bit 0 – INTF0 External Interrupt Flag 0

When an edge or logic change on the INT0 pin triggers an interrupt request, INTF0 becomes set (one). If the I-bit in SREG and the INT0 bit in EIMSK are set (one), the MCU will jump to the corresponding Interrupt Vector. The flag is cleared when the interrupt routine is executed. Alternatively, the flag can be cleared by writing a logical one to it. This flag is always cleared when INT0 is configured as a level interrupt.