1 PolarFire FPGA Transceiver Demo

This document presents five designs that demonstrate the use of PolarFire® transceivers in 8b10b, 64b66b, PMA modes, PMA bit slip feature, and use of SmartBERT IP The current version of this document contains designs that provide Libero® design flow examples, HDL simulation, and transceiver validation on a PolarFire Evaluation board. These reference designs show how to configure and create simple PolarFire FPGA transceiver designs using Libero SoC software.

The multi-rate transceiver reference design can be programmed using any of the following options:

• Using the job file: To program the device using the job file provided with the design files, see Appendix 3: Programming the Device Using FlashPro Express.
• Using Libero SoC: To program the device using Libero SoC, see Programming the Device on the Evaluation Kit. Use this option when the reference design is modified.
  Important: To evaluate the performance and features of the transceiver to the design requirements, use the reference designs.