22.3 Compare Mode

The Compare mode function described in this section is available and identical for all CCP modules.

Compare mode uses the 16-bit odd numbered Timer resources (Timer1, Timer3, etc.). The 16-bit value of the CCPRx register is constantly compared against the 16-bit value of the TMRx register. When a match occurs, one of the following events can occur:

  • Toggle the CCPx output and clear TMRx
  • Toggle the CCPx output without clearing TMRx
  • Set the CCPx output
  • Clear the CCPx output
  • Pulse output
  • Pulse output and clear TMRx

The action on the pin is based on the value of the MODE control bits. At the same time, the interrupt flag CCPxIF bit is set, and an ADC conversion can be triggered, if selected.

All Compare modes can generate an interrupt and trigger an ADC conversion. When MODE = ‘0001’ or ‘1011’, the CCP resets the TMRx register.

The following figure shows a simplified diagram of the compare operation.

Figure 22-2. Compare Mode Operation Block Diagram