44.7.7 Comparator Interrupt Flag Status and Clear

Note: Interrupt flags must be cleared and then read back to confirm they are cleared before exiting the ISR to avoid double interrupts.

Table 44-8. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Grey cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
K	Write to clear	S	Software settable bit	—	—

Name:	INTFLAG
Offset:	0x18
Reset:	0x00000000
Property:	–


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8
								WIN0
Access								R/W/HS
Reset								0


Bit	7	6	5	4	3	2	1	0
							COMP1	COMP0
Access							R/W/HS	R/W/HS
Reset							0	0

Bit 8 – WIN0 Window 0

This flag is set according to the Window 0 Interrupt Selection bit group in the WINCTRL register (WINCTRL.WINTSEL0) and will generate an interrupt if INTENCLR/SET.WIN0 is also one.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the Window 0 interrupt flag.

Bits 0, 1 – COMPn Comparator n Interrupt Status (n=0,1)

Reading this bit returns the status of the Comparator n interrupt flag.

This flag is set according to the Interrupt Selection bit group in the Comparator n Control register (COMPCTRLn.INTSEL) and will generate an interrupt if INTENCLR/SET.COMPn is also one.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the Comparator n interrupt flag.