44.7.13 Comparator DAC Control
Note: This register can only be written while COMPCTRLn.ENABLE =0.
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | DACCTRL |
| Offset: | 0x38 |
| Reset: | 0x00000000 |
| Property: | PAC Write-Protection, Enable-Protected |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| SHEN1 | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| VALUE1[6:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| SHEN0 | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| VALUE0[6:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
Bit 31 – SHEN1 Comparator1 DAC1 Sample and Hold Enable Operating Mode
This bit enables the odd DAC low-power operation.
Note: If DACCTRL0.SHEN0=1 user must
initialize AC.CTRLC.PER and AC.CTRLC.WIDTH accordingly.
Note: This bit can be written only while COMPCTRL1.ENABLE is zero.
| Value | Description |
|---|---|
| 0 | Continuous operation mode is enabled. |
| 1 | Sample-and-hold operation mode is enabled. |
Bits 22:16 – VALUE1[6:0] Comparator1 DAC1 Output Value
These bits define the scaling factor for odd DAC channel voltage reference. The output voltage, VOUT, is:
Note: This bit can be written only while COMPCTRL1.ENABLE is zero.
Bit 15 – SHEN0 Comparator0 DAC0 Sample and Hold Enable Operating Mode
This bit enabled the even DAC low-power operation.
Note: If DACCTRLn.SHENn=1 user must initialize AC.CTRLC.PER and AC.CTRLC.WIDTH
accordingly.
Note: This bit can be written only while COMPCTRL0.ENABLE is zero.
| Value | Description |
|---|---|
| 0 | Continuous operation mode is enabled. |
| 1 | Sample-and-hold operation mode is enabled. |
Bits 6:0 – VALUE0[6:0] Comparator0 DAC0 Output Value
These bits define the scaling factor for even DAC channel voltage reference. The output voltage, VOUT, is:
These bits can be written only while COMPCTRL0.ENABLE is zero.