26.7.10 Backup Output Control

Note: These register bits are useful for indicating to users external application logic MCU Backup mode entry/exit.
Table 26-12. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit — —
Name: BKOUT
Offset: 0x0028
Reset: 0x00000000
Property: PAC Write-Protection

Bit 3130292827262524 
     TGLOM1[1:0]TGLOM0[1:0] 
Access R/WR/WR/WR/W 
Reset 0000 
Bit 2322212019181716 
      SETn SETn 
Access WW 
Reset 00 
Bit 15141312111098 
      CLRn CLRn 
Access WW 
Reset 00 
Bit 76543210 
      ENn ENn 
Access WW 
Reset 00 

Bits 24:25, 26:27 – TGLOMn SUPC_OUTn Pin Toggle Output Mode for Backup Output n, n = 0,1

ValueDescription
0x0 SUPC_OUTn pin output does not toggle (DISABLE).
0x1 SUPC_OUTn pin output toggles on RTC events (RTCTGL).
0x2 SUPC_OUTn pin output is set when the device enters Backup mode (BKUPTGL). The output should then be cleared by software using CLRn.
0x3 Reserved.

Bits 16,18 – SETn SUPC_OUTn Pin Set Output for Backup Output n, n = 0,1

Writing a '0' to a bit has no effect.

Writing a '1' to a bit will set the corresponding output.

Reading this bit returns '0'.

Bits 8,10 – CLRn SUPC_OUTn Pin Clear Output for Backup Output n, n = 0,1

Writing a '0' to a bit has no effect.

Writing a '1' to a bit will clear the corresponding output.

Reading this bit returns '0'.

Bits 0,2 – ENn SUPC_OUTn Pin Enable Output for Backup Output n, n = 0,1

ValueDescription
0 SUPC_OUTn Backup Output pin disabled.
1 SUPC_OUTn Backup Output pin enabled.