26.7.6 BOR Control
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | BOR |
| Offset: | 0x0014 |
| Reset: | 0x00000000 |
| Property: | PAC Write Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| BORFILT[1:0] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 | |||||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DCBORPSEL[2:0] | ACTION | ||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bits 9:8 – BORFILT[1:0] BOR Filtering
| Value | Description |
|---|---|
| 0x0 | No digital filtering (NOFILT) |
| 0x1 | 32µs filtering (FILT32US) |
| 0x2 | 125µs filtering (FILT125US) |
| 0x3 | 250µs filtering (FILT250US) |
Bits 6:4 – DCBORPSEL[2:0] Duty Cycle BOR Prescaler Select
| Value | Description |
|---|---|
| 0x0 | Not Divided (NODIV) |
| 0x1 | Divide clock by 2 (DIV2) |
| 0x2 | Divide clock by 4 (DIV4) |
| 0x3 | Divide clock by 8 (DIV8) |
| 0x4 | Divide clock by 16 (DIV16) |
| 0x5 | Divide clock by 32 (DIV32) |
| 0x6 | Divide clock by 64 (DIV64) |
| 0x7 | Divide clock by 128 (DIV128) |
Bit 0 – ACTION Action when Threshold Crossed
| Value | Description |
|---|---|
| 0x0 | The BOR generates a reset (RESET) |
| 0x1 | Reserved |