7.2.2 PIOB Pin List

Table 7-2. PIOB Pin Description
Pad No.Power RailI/O TypePrimaryAlternatePIO PeripheralReset State(1)Note
SignalDirSignalDirFuncSignalDirIO SetSignal, Dir, PU, PD, HiZ, ST
7VDDIOP0GPIOPB0GPIOAG0_COLI/O1PIO, I, PU, ST
BFLEXCOM6_IO3I/O1
CEXT_IRQ0I/O1
DA18I/O1,2
ESPDIF_RXI/O2
5VDDIOP0GPIOPB1GPIOAG0_CRSI/O1PIO, I, PU, ST
BFLEXCOM6_IO1I/O1
CEXT_IRQ1I/O1
DA19I/O1,2
ESPDIF_TXI/O2
FFLEXCOM11_IO0I/O3
6VDDIOP0GPIOPB2GPIOAG0_TSUCOMPI/O1PIO, I, PU, ST
BFLEXCOM6_IO0I/O1
CADTRGI/O1
DA20I/O1,2
FFLEXCOM11_IO1I/O3
139VDDIOP0GPIOPB3GPIOARF1I/O1PIO, I, PU, ST
BFLEXCOM11_IO0I/O1
CPCK2I/O2
DD8I/O1,2
140VDDIOP0GPIOPB4GPIOATF1I/O1PIO, I, PU, ST
BFLEXCOM11_IO1I/O1
CPCK3I/O2
DD9I/O1,2
141VDDIOP0GPIOPB5GPIOATK1I/O1PIO, I, PU, ST
BFLEXCOM11_IO2I/O1,2,3,4,5
CPCK4I/O2
DD10I/O1,2
142VDDIOP0GPIOPB6GPIOARK1I/O1PIO, I, PU, ST
BFLEXCOM11_IO3I/O1,2,3,4,5
CPCK5I/O2
DD11I/O1,2
143VDDIOP0GPIOPB7GPIOATD1I/O1PIO, I, PU, ST
BFLEXCOM11_IO4I/O1,2,3,4,5
CFLEXCOM3_IO5I/O2,3,4,5
DD12I/O1,2
144VDDIOP0GPIOPB8GPIOARD1I/O1PIO, I, PU, ST
BFLEXCOM8_IO0I/O1
CFLEXCOM3_IO6I/O2,3,4,5
DD13I/O1,2
156VDDQSPI0GPIOHSPB9GPIOAQSPI0_IO3I/O1PIO, I, PU, ST(2)
BFLEXCOM8_IO1I/O1
CPDMC0_CLKI/O1
EPWML0I/O2
148VDDQSPI0GPIOHSPB10GPIOAQSPI0_IO2I/O1PIO, I, PU, ST
BFLEXCOM8_IO2I/O1
CPDMC0_DS0I/O1
EPWMH0I/O2
158VDDQSPI0GPIOHSPB11GPIOAQSPI0_IO1I/O1PIO, I, PU, ST
BFLEXCOM8_IO3I/O1
CPDMC0_DS1I/O1
EPWML1I/O2
157VDDQSPI0GPIOHSPB12GPIOAQSPI0_IO0I/O1PIO, I, PU, ST
BFLEXCOM8_IO4I/O1
CFLEXCOM6_IO5I/O1
EPWMH1I/O2
151VDDQSPI0GPIOPB13GPIOAQSPI0_CSI/O1PIO, I, PU, ST
BFLEXCOM9_IO0I/O1
CFLEXCOM6_IO6I/O1
EPWML2I/O2
155VDDQSPI0GPIOHSPB14GPIOAQSPI0_SCKI/O1PIO, I, PU, ST(2)
BFLEXCOM9_IO1I/O1
EPWMH2I/O2
154VDDQSPI0GPIOHSPB15GPIOAQSPI0_SCKNI/O1PIO, I, PU, ST
BFLEXCOM9_IO2I/O1
EPWML3I/O2
152VDDQSPI0GPIOHSPB16GPIOAQSPI0_IO4I/O1PIO, I, PU, ST
BFLEXCOM9_IO3I/O1
CPCK0I/O1
EPWMH3I/O2
FEXT_IRQ0I/O2
159VDDQSPI0GPIOHSPB17GPIOAQSPI0_IO5I/O1PIO, I, PU, ST
BFLEXCOM9_IO4I/O1
CPCK1I/O1
EPWMEXTRG0I/O2
FEXT_IRQ1I/O2
150VDDQSPI0GPIOHSPB18GPIOAQSPI0_IO6I/O1PIO, I, PU, ST
CPCK2I/O1
EPWMEXTRG1I/O2
149VDDQSPI0GPIOHSPB19GPIOAQSPI0_IO7I/O1PIO, I, PU, ST
CPCK3I/O1
EPWMFI0I/O2
153VDDQSPI0GPIOHSPB20GPIOAQSPI0_DQSI/O1PIO, I, PU, ST
EPWMFI1I/O2
160VDDQSPI0GPIOPB21GPIOAQSPI0_INTI/O1PIO, I, PU, ST
CFLEXCOM9_IO5I/O1
VDD_3V3GPIOPB22GPIOAQSPI1_IO3I/O1PIO, I, PU, ST(3)
VDD_3V3GPIOPB23GPIOAQSPI1_IO2I/O1PIO, I, PU, ST
VDD_3V3GPIOPB24GPIOAQSPI1_IO1I/O1PIO, I, PU, ST
VDD_3V3GPIOPB25GPIOAQSPI1_IO0I/O1PIO, I, PU, ST
68VDD_3V3GPIOPB26GPIOAQSPI1_CS_PB26I/O1PIO, I, PU, ST
VDD_3V3GPIOPB27GPIOAQSPI1_SCKI/O1PIO, I, PU, ST
52VDDSDMMC1GPIOPB28GPIOASDMMC1_RSTNI/O1PIO, I, PU, ST
BADTRGI/O2
EPWMFI0I/O1
FFLEXCOM7_IO0I/O4
53VDDSDMMC1GPIOHSPB29GPIOASDMMC1_CMDI/O1PIO, I, PU, ST
BFLEXCOM3_IO2I/O2,3,4,5
CFLEXCOM0_IO5I/O2
DTIOA3I/O1
EPWMFI1I/O1
FFLEXCOM7_IO1I/O4
58VDDSDMMC1GPIOHSPB30GPIOASDMMC1_CKI/O1PIO, I, PU, ST
BFLEXCOM3_IO3I/O2,3,4,5
CFLEXCOM0_IO6I/O2
DTIOB3I/O1
EPWMH0I/O1
FFLEXCOM8_IO0I/O4
54VDDSDMMC1GPIOHSPB31GPIOASDMMC1_DAT0I/O1PIO, I, PU, ST
BFLEXCOM3_IO4I/O2,3,4,5
CFLEXCOM9_IO5I/O2,3,4,5
DTCLK3I/O1
EPWML0I/O1
FFLEXCOM8_IO1I/O4
Note:
  1. Signal = ‘PIO’ if GPIO; Dir = Direction; PU = Pull-up; PD = Pull-down; HiZ = High impedance; ST = Schmitt Trigger
  2. NAND Flash and FLEXCOM10 interfaces are not accessible. They are already used internally.
  3. Fixed function. Used for QSPI memory interface embeds in the module.