10.2.2 Memory Regions

The NVM memory space of the SAM devices is divided into two sections: a Main Array section, and an Auxiliary space section. The Main Array space can be configured to have an (emulated) EEPROM and/or boot loader section. The memory layout with the EEPROM and bootloader partitions is shown in Figure 10-1.

Figure 10-1. Memory Regions

The Main Array is divided into rows and pages, where each row contains four pages. The size of each page may vary from 8-1024 bytes dependent of the device. Device specific parameters such as the page size and total number of pages in the NVM memory space are available via the nvm_get_parameters() function.

An NVM page number and address can be computed via the following equations:

P a g e N u m = ( R o w N u m × 4 ) + P a g e P o s I n R o w
P a g e A d d r = P a g e N u m × P a g e S i z e

Figure 10-2 shows an example of the memory page and address values associated with logical row 7 of the NVM memory space.

Figure 10-2. Memory Regions