43.1.12 I/O Pin AC/DC Electrical Specifications

Table 43-16. I/O Pin AC/DC Electrical Specifications
AC - DC CharacteristicsStandard Operating Conditions: VDD = 1.9V to 3.6V (unless otherwise stated) Operating Temperature: -40°C ≤ TA ≤ +85°C for Industrial Temp -40°C ≤ TA ≤ +125°C for Extended Temp
Param. No.SymbolCharacteristicsMin.Typ.Max.UnitsConditions
DI_1VILInput low voltage I/O pins (Drive strength, 8x)VSS—0.2*VDDVVDDIO(min) to VDDIO(max)
Input low voltage I/O pins (Drive strength, 4x)—0.2*VDDMedia local bus functions only
DI_3VIHInput high voltage, I/O pins (Drive strength, 8x)0.65*VDD—VDDVVDDIO(min) to VDDIO(max)
Input high voltage, I/O pins (Drive strength, 4x)0.65*VDD—VDDVVDDIO(min) to VDDIO(max)
DI_5VOL4x Drive strength I/O pins (Output low)——0.4VVDDIO = 3.3V @ IOL = 10 mA
8x Drive strength I/O pins (Output low)——0.4 VDDIO = 3.3V @ IOL = 15 mA
DI_9VOH4x Drive strength I/O pins (Output high)VDD-0.6——VVDDIO = 3.3V @ IOH = 10 mA
8x Drive strength I/O pins (Output high)VDD-0.6——VDDIO = 3.3V @ IOH = 15 mA
DI_13IILInput pin leakage current -1— +1μA

GND ≤ VPIN ≤ VDDIO(max)

(VPIN = Voltage present on pin)

DI_15RPDWNInternal pull-down resistance101840kΩVDDIO(min) to VDDIO(max)
DI_17RPUPInternal pull-up resistance1013 30kΩ
DI_19IICLInput low injection current 0—-5mAThis parameter applies to all I/O pins except VDD, VSS, AVDD,AVSS, MCLR(1,4,5)
DI_21IICHInput high injection current0— +5mAThis parameter applies to all pins, except VDD, VSS, AVDD,AVSS, MCLR and 5V tolerant pins(2,3,4,5)

DI_23

∑IICTTotal Input Injection Current (sum of all I/O and control pins) Absolute value of | ∑IICT |-20—+20mAAbsolute instantaneous sum of all ± input injection currents from all I/O pins. ( | IICL | + | IICH | ) ≤ ∑IICT
DI_25TRISEI/O pin rise time (Drive strength, 4x)——14nsVDDIO = 3V, CLOAD = 50 pf
I/O pin rise time (Drive strength, 4x)——14 ns VDDIO = 3V, CLOAD = 40 pf
I/O pin rise time (Drive strength, 8x) ——8nsVDDIO = 3V, CLOAD = 50 pf
I/O pin rise time (Drive strength, 8x)——6ns VDDIO = 3V, CLOAD = 40 pf
DI_27TFALLI/O pin fall time (Drive strength, 4x)——13nsVDDIO = 3V, CLOAD = 50 pf
I/O pin fall time (Drive strength, 4x)——12 ns VDDIO = 3V, CLOAD = 40 pf
I/O pin fall time (Drive strength, 8x)——8nsVDDIO = 3V, CLOAD = 50 pf
I/O pin fall time (Drive strength, 8x)——6 ns VDDIO = 3V, CLOAD = 40 pf
Note:
  1. VIL source < (GND – 0.3). Characterized but not tested in manufacturing.
  2. VIH source > (VDDIO + 0.3). Characterized but not tested in manufacturing.
  3. Digital 5V tolerant pins do not have an internal high side Diode to VDDIO , and therefore, cannot tolerate any “positive” input injection current.
  4. If the sum of all injection currents are > | ∑IICT |, it can affect the ADC results by approximately 4 to 6 counts (in other words, VIH Source > (VDDIO + 0.3) or VIL source < (GND – 0.3)).
  5. Any number and the combination of I/O pins not excluded under IICL or IICH conditions are permitted provided the absolute instantaneous sum of the input injection currents from all pins do not exceed the specified ∑IICT limit. To limit the injection current, the user must insert a resistor in series RSERIES (RS), between the input source voltage and device pin. The resistor value is calculated according to:
    • For negative input voltages less than (GND – 0.3): RS ≥ absolute value of | ((VIL source – (GND – 0.3))/IICL) |
    • For positive input voltages greater than (VDDIO + 0.3): RS ≥ ((VIH source – (VDDIO +0.3))/IICH)
    • For VPIN voltages greater than VDDIO + 0.3 and less than GND – 0.3: RS = the larger of the values calculated above