28.3.3.1 Data Hazards On Endpoint Status

Both the USB hardware and the application will modify the Endpoint STATUS registers. To perform a safe write access to the Endpoint STATUS registers, the RMW interface provided by the STATUS{In/Out}{Clear/Set}n allows setting or clearing of bits in Endpoint n IN/OUT. By writing a bit mask to these registers, the USB will set or clear the appropriate bits in the RAM location at a safe time. When an RMW operation triggered by a write to STATUS{In/Out}{Clear/Set}n is ongoing, the RMWBUSY bit in INTFLAGSB is set.

The result of a write to STATUS{In/Out}{Clear/Set} while RMWBUSY is set is undefined.