28.3.1.1 Clock Generation

The USB peripheral requires two clock signals; a peripheral clock (CLK_PER) and a USB clock (CLK_USB). CLK_PER is used for the register and SRAM interfaces and must be at least 12 MHz. CLK_USB must be a nominal 48 MHz. This clock is run-time calibrated using the 1 ms interval between Start-of-Frame (SOF) packets as a reference. See the CLKCTRL - Clock Controller section for information on configuring these clocks.