7.5.1 Set RSWP
Setting the RSWP is enabled by sending the Set RSWP command, similar to a normal write
command to the device which programs the write protection to the target quadrant. The Set
RSWP sequence requires sending a device address byte of ‘0110MMM0’ (where
‘M’ represents the memory quadrant identifier for the target quadrant
to be write protected) with the R/W bit set to ‘0’.
In conjunction with sending the protocol, the A0 pin must be connected to VHV
for the duration of the RSWP sequence (see Figure 7-5). The Set RSWP command acts on a single quadrant only as specified in the Set RSWP
command and can only be reversed by issuing the Clear RSWP command and will unprotect all
quadrants in one operation (see Table 7-3). For
example, if Quadrant 0 and Quadrant 3 are to be write-protected, two separate Set RSWP
commands would be required. However, only one Clear RSWP command is needed to clear and
unprotect both quadrants.
| Function | Device Address Byte | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| Pin | Device Type Identifier | Memory Quadrant Identifier | R/W Select | ||||||||
| A2 | A1 | A0 | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 | |
| Set RSWP, Quadrant 0 | x | x | VHV | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 |
| Set RSWP, Quadrant 1 | x | x | 1 | 0 | 1 | 0 | |||||
| Set RSWP, Quadrant 2 | x | x | 1 | 0 | 1 | 0 | |||||
| Set RSWP, Quadrant 3 | x | x | 0 | 0 | 0 | 0 | |||||
| Clear RSWP | x | x | 0 | 1 | 1 | 0 | |||||
xis ‘don’t care’, but it is recommended to be hard-wired to VCC or GND.- See Table 4-2 for VHV value.
- Due to the requirement for the A0 pin to be driven to VHV, the RSWP set and RSWP clear commands are fully supported in a single DIMM (isolated DIMM) end application or a single DIMM programming station only.
Mis the memory quadrant identifier.Xis ‘don’t care’.