14.4.3.5 TX Power Ramping

To optimize the output power spectral density (PSD), individual transmitter blocks are enabled sequentially. A transmit action is started by either the rising edge of pin 11 (SLP_TR) or by writing TX_START command to the TRX_CMD bits in the TRX_STATE register (TRX_STATE.TRX_CMD). One symbol period later the data transmission begins. During this time period, the PLL settles to the frequency used for transmission. The PA is enabled prior to the data transmission start. This PA lead time can be adjusted with the PA_LT bits in the RF_CTRL_0 register (RF_CTRL_0.PA_LT). The PA is always enabled at the lowest gain value corresponding to GC_PA = 0. Then the PA gain is increased automatically to the value set by the GC_PA bits in the PHY_TX_PWR register (PHY_TX_PWR.GC_PA). After transmission is completed, TX power ramping down is performed in an inverse order.

The control signals associated with TX power ramping are shown in Figure 9‑13. In this example, the transmission is initiated with the rising edge of pin 11 (SLP_TR). The radio transceiver state changes from PLL_ON to BUSY_TX.

Figure 14-47. TX Power Ramping Example (O-QPSK 250kb/s Mode)

Using an external RF front-end (refer to Section 11.4), it may be required to adjust the startup time of the external PA relative to the internal building blocks to optimize the overall PSD. This can be achieved using the RF_CTRL_0.PA_LT bits.