14.2.2.5 Interrupt Handling

The AT86RF212B interrupt handling in the Extended Operating Mode is similar to the Basic Operating Mode. Interrupts can be enabled by setting the appropriate bit in the IRQ_MASK register.

For RX_AACK and TX_ARET modes the following interrupts inform about the status of a frame reception and transmission:

Table 14-18. Interrupt Handling in Extended Operating Mode
Mode	Interrupt	Description
RX_AACK	IRQ_2 (RX_START)	Indicates a PHR reception
	IRQ_5 (AMI)	Issued at address match
	IRQ_3 (TRX_END)	Signals completion of RX_AACK transaction if successful A received frame must pass the address filter The FCS is valid
TX_ARET	IRQ_3 (TRX_END)	Signals completion of TX_ARET transaction
RX_AACK/ TX_ARET	IRQ_0 (PLL_LOCK)	Entering RX_AACK_ON or TX_ARET_ON state from TRX_OFF state, the PLL_LOCK interrupt signals that the transaction can be started

RX_AACK

For support of the RX_AACK functionality, it is recommended to enable IRQ_3 (TRX_END). This interrupt is issued only if frames pass the frame filtering, and have a valid FCS to reflect data validity. This functionality differs in Basic Operating Mode. The usage of other interrupts is optional.

On reception of a valid PHR an IRQ_2 (RX_START) is issued. IRQ_5 (AMI) indicates address match, refer to the rules in the filter filter, and the completion of a frame reception with a valid FCS is indicated by interrupt IRQ_3 (TRX_END).

Thus, it can happen that an IRQ_2 (RX_START) and/or IRQ_5 (AMI) are issued, but the IRQ_3 (TRX_END) interrupt is never triggered when a frame does not pass the FCS computation check.

TX_ARET

The IRQ_3 (TRX_END) interrupt is always generated after completing a TX_ARET transaction. Subsequently the transaction status can be read from the TRAC_STATUS bits in the TRX_STATE register (TRX_STATE.TRAC_STATUS).

Several interrupts are automatically suppressed by the radio transceiver during TX_ARET transaction. The CCA algorithm (part of CSMA-CA) does not generate interrupt IRQ_4 (CCA_ED_DONE). Furthermore, the interrupts IRQ_2 (RX_START) and/or IRQ_5 (AMI) are not generated during the TX_ARET acknowledgment receive process.

All other interrupts as described in Section 6.7, are also available in Extended Operating Mode.