14.2.2.2 Configuration

As the usage of the Extended Operating Mode is based on Basic Operating Mode functionality, only features beyond the basic radio transceiver functionality are described in the following sections. For details refer to Basic Operating Mode.

When using the RX_AACK or TX_ARET modes, the following registers need to be configured.

RX_AACK configuration steps:

  • Set the short address, PAN ID, and IEEE address; SHORT_ADDRESS_x, PAN_ID_x and IEEE_ADDR_x registers
  • Configure RX_AACK properties; XAH_CTRL_0 and CSMA_SEED_1 registers
    • Handling of Frame Version Subfield
    • Handling of Pending Data Indicator
    • Characterization as PAN coordinator
    • Handling of Slotted Acknowledgement
  • Additional Frame Filtering Properties; XAH_CTRL_1 and CSMA_SEED_1 registers
    • Use of Promiscuous Mode
    • Use of automatic ACK generation
    • Handling of reserved frame types

Refer to the Frame Filter Configuration for details. The addresses for the address match algorithm are to be stored in the appropriate address registers. Additional control of the RX_AACK mode is done with the XAH_CTRL_1 and CSMA_SEED_1 registers.

As long as a short address is not set, only broadcast frames and frames matching the full 64-bit IEEE address can be received.

Configuration examples for different device operating modes and handling of various frame types can be found in Description of RX_AACK Configuration Bits.

TX_ARET configuration steps:

  • Set register bit TX_AUTO_CRC_ON = 1; TRX_CTRL_1 register
  • Configure CSMA-CA
    • MAX_FRAME_RETRIES; XAH_CTRL_0 register
    • MAX_CSMA_RETRIES; XAH_CTRL_0 register
    • CSMA_SEED; CSMA_SEED_0 and CSMA_SEED_1 registers
    • MAX_BE, MIN_BE; CSMA_BE register
  • Configure CCA

The MAX_FRAME_RETRIES bits in the XAH_CTRL_0 register (XAH_CTRL_0.MAX_FRAME_RETRIES) defines the maximum number of frame retransmissions.

The MAX_CSMA_RETRIES bits in the XAH_CTRL_0 register (XAH_CTRL_0.MAX_CSMA_RETRIES) configure the number of CSMA-CA retries after a busy channel is detected.

The CSMA_SEED_0 and CSAM_SEED_1 bits in the CSMA_SEED_0 and CSMA_SEED_1 registers (CSMA_SEED_0 .CSMA_SEED_0[7:0] and CSMA_SEED_1.CSMA_SEED_1[3:0]) defines a random seed for the backoff-time random-number generator in the AT86RF212B.

The MAX_BE and MIN_BE bits in the CSMA_BE register (CSMA_BE.MAX_BE and CSMA_BE.MIN_BE) set the maximum and minimum CSMA backoff exponent (see [2]), respectively.