18.6.6 RTC Time Alarm Register (Default Mode)
This register can only be written if the WPEN bit is cleared in the System Controller Write Protection Mode register (SYSC_WPMR).
To change one of the SEC, MIN, HOUR fields, it is recommended to disable the field before changing the value and then re-enable it after the change has been made. This requires up to three accesses to RTC_TIMALR. The first access clears the enable corresponding to the field to change (SECEN, MINEN, HOUREN). If the field is already cleared, this access is not required. The second access performs the change of value (SEC, MIN, HOUR). The third access is required to re-enable the field by writing 1 in the SECEN, MINEN, HOUREN fields.
Name: | RTC_TIMALR (DEFAULT_MODE) |
Offset: | 0x10 |
Reset: | 0x00000000 |
Property: | Read/Write |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
HOUREN | AMPM | HOUR[5:0] | |||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
MINEN | MIN[6:0] | ||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
SECEN | SEC[6:0] | ||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 23 – HOUREN Hour Alarm Enable
Value | Name | Description |
---|---|---|
0 | DISABLED | The hour-matching alarm is disabled. |
1 | ENABLED | The hour-matching alarm is enabled. |
Bit 22 – AMPM AM/PM Indicator
This field is the alarm field corresponding to the BCD-coded hour counter.
Bits 21:16 – HOUR[5:0] Hour Alarm
This field is the alarm field corresponding to the BCD-coded hour counter.
Bit 15 – MINEN Minute Alarm Enable
Value | Name | Description |
---|---|---|
0 | DISABLED | The minute-matching alarm is disabled. |
1 | ENABLED | The minute-matching alarm is enabled. |
Bits 14:8 – MIN[6:0] Minute Alarm
This field is the alarm field corresponding to the BCD-coded minute counter.
Bit 7 – SECEN Second Alarm Enable
Value | Name | Description |
---|---|---|
0 | DISABLED | The second-matching alarm is disabled. |
1 | ENABLED | The second-matching alarm is enabled. |
Bits 6:0 – SEC[6:0] Second Alarm
This field is the alarm field corresponding to the BCD-coded second counter.