39.8.14 Period Value, 16-bit Mode
Note: This register is write-synchronized:
SYNCBUSY.PER must be checked to ensure the PER register synchronization is complete.
Name: | PER |
Offset: | 0x1A |
Reset: | 0xFFFF |
Property: | Write-Synchronized |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
PER[15:8] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
PER[7:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bits 15:0 – PER[15:0] Period Value
These bits hold the value of the TC period count.