7.6.6.7 PUF Interrupt Status Register

The following configuration values are valid for all listed bit names of this register:

0: The corresponding interrupt source has not triggered the interrupt line.

1: The corresponding interrupt source triggered the interrupt line.

Writing a 1 to a bit clears the corresponding bit.

Name: PUF_ISR
Offset: 0x018
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
  RESEEDRRESEEDW      
Access R/WR/W 
Reset 00 
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
  DOREQDIREQREJECTEDZEROIZEDERROROKBUSY 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 

Bit 30 – RESEEDR Reseed Action Required (cleared by writing a 1)

Bit 29 – RESEEDW Reseed Warning (cleared by writing a 1)

Bit 6 – DOREQ Data Out Request (cleared by writing a 1)

Bit 5 – DIREQ Data In Request (cleared by writing a 1)

Bit 4 – REJECTED Last Activation Code Rejection (cleared by writing a 1)

Bit 3 – ZEROIZED Zeroized Operation Completed (cleared by writing a 1)

Bit 2 – ERROR Last Operation Fail (cleared by writing a 1)

Bit 1 – OK Last Operation Achievement (cleared by writing a 1)

Bit 0 – BUSY Operation in Progress (cleared by writing a 1)