fCPU |
CPU clock frequency |
8 |
32 |
MHz |
fAHB |
AHB clock frequency |
8 |
32 |
MHz |
fAPBA |
APBA clock frequency/Bus clock domain = BACKUP |
8 |
8 |
MHz |
fAPBA |
APBA clock frequency/Bus clock domain = Low
Power |
8 |
32 |
MHz |
fAPBB |
APBB clock frequency |
8 |
32 |
MHz |
fAPBC |
APBC clock frequency |
8 |
32 |
MHz |
fGCLK_DFLL48M_REF |
DFLL48M Reference clock frequency |
NA |
33 |
kHz |
fGCLK_FDPLL |
FDPLL96M Reference clock frequency |
2 |
2 |
MHz |
fGCLK_FDPLL_32K |
FDPLL96M 32k Reference clock
frequency |
32 |
32 |
kHz |
fGCLK_EIC |
EIC input clock frequency |
12 |
48 |
MHz |
fGCLK_FREQM_MSR |
FREQM Measure |
12 |
48 |
MHz |
fGCLK_FREQM_REF |
FREQM Reference |
12 |
48 |
MHz |
fGCLK_USB |
USB input clock frequency |
NA |
48 |
MHz |
fGCLK_EVSYS_CHANNEL_0 |
EVSYS channel 0 input clock
frequency |
12 |
48 |
MHz |
fGCLK_EVSYS_CHANNEL_1 |
EVSYS channel 1 input clock
frequency |
fGCLK_EVSYS_CHANNEL_2 |
EVSYS channel 2 input clock
frequency |
fGCLK_EVSYS_CHANNEL_3 |
EVSYS channel 3 input clock
frequency |
fGCLK_EVSYS_CHANNEL_4 |
EVSYS channel 4 input clock
frequency |
fGCLK_EVSYS_CHANNEL_5 |
EVSYS channel 5 input clock
frequency |
fGCLK_EVSYS_CHANNEL_6 |
EVSYS channel 6 input clock
frequency |
fGCLK_EVSYS_CHANNEL_7 |
EVSYS channel 7 input clock
frequency |
fGCLK_SERCOMx_SLOW |
Common SERCOM slow input clock
frequency |
1 |
5 |
MHz |
fGCLK_SERCOM0_CORE |
SERCOM0 input clock frequency |
12 |
48 |
MHz |
fGCLK_SERCOM1_CORE |
SERCOM1 input clock frequency |
fGCLK_SERCOM2_CORE |
SERCOM2 input clock frequency |
fGCLK_SERCOM3_CORE |
SERCOM3 input clock frequency |
fGCLK_SERCOM4_CORE |
SERCOM4 input clock frequency |
fGCLK_SERCOM5_CORE |
SERCOM5 input clock frequency |
fGCLK_TCC0 |
TCC0 input clock frequency |
24 |
96 |
MHz |
fGCLK_TC0, GCLK_TC1 |
TC0,TC1 input clock frequency |
12 |
48 |
MHz |
fGCLK_TC2, GCLK_TC3 |
TC2,TC3 input clock frequency |
fGCLK_ADC |
ADC input clock frequency |
12 |
48 |
MHz |
fGCLK_AC |
AC digital input clock frequency |
fGCLK_PTC |
PTC input clock frequency |
fGCLK_CCL |
CCL input clock frequency |
fGCLKin |
External GCLK clock input |