44.7 Wake-up Timing
Conditions:
- VDD = 3.3V
- LDO Regulation mode
- CPU clock = OSC16M @12MHz
- 1 Wait-state
- Cache enabled
- Flash Fast Wake up enabled (NVMCTRL->CTRLB.FWUP=1)
- Flash in WAKEUPINSTANT mode (NVMCTRL->CTRLB.SLEEPPRM=1)
Measure method:
- For IDLE and STANDBY, CPU sets an IO by writing PORT->IOBUS without jumping in an interrupt handler (Cortex M0+ register PRIMASK=1). The wake-up time is measured between the falling edge of the input signal and to the rising edge of the GPIO pin.
- For Backup, the exit of mode is done through reset, the set of the IO is done by the first executed instructions after reset. For OFF mode, the exit of mode is done through reset pin, the time is measured between the rising edge of the RESETN signal and the set of the IO done by the first executed instructions after reset.
- For OFF mode, the exit of mode is done through reset pin, the time is measured between the rising edge of the RESETN signal and the set of the IO done by the first executed instructions after reset.
| Sleep Mode | Condition | Typ. | Unit |
|---|---|---|---|
| IDLE | PL2 or PL0 | 1 | µs |
| STANDBY | PL0 and PM.PLSEL.PLDIS=1 | 2.5 | µs |
| STANDBY | PL2 and Voltage scaling at default values:
SUPC->VREG.VSVSTEP=0 SUPC->VREG.VSPER=0 |
70 | µs |
| STANDBY | PL2 and Voltage scaling at fastest setting:
SUPC->VREG.VSVSTEP=15 SUPC->VREG.VSPER=0 |
15 | µs |
| BACKUP | 90 | µs | |
| OFF | 2500 | µs |