Introduction

This guide provides pin and packaging information (such as, bank assignments and mechanical information) for Radiation-Tolerant (RT) PolarFire® System-on-Chip (SoC) Field Programmable Gate Arrays (FPGAs).

RT PolarFire SoC FPGAs feature a flexible I/O structure that supports a range of mixed voltages through bank selection. The High Speed Input/Output (HSIO), General-Purpose Input/Output (GPIO) and MSSIO are configured as differential I/Os or two single-ended I/Os. For more information about HSIO, GPIO, MSSIO and supported I/O standards, see PolarFire Family I/O User Guide.

Important: Some of the protocol standard uses the terminology Master and Slave. The equivalent Microchip terminology used in this document is Initiator and Target, respectively.