Writing a '0' to this bit has no
effect.
Writing a '1' to this bit resets all
registers in the FREQM to their initial state, and the FREQM will be disabled.
Writing a '1' to this bit will always take precedence, meaning that all other writes
in the same write-operation will be discarded.
Note:
- When the CTRLA.SWRST is written, the user must poll the SYNCBUSY.SWRST bit to
know when the reset operation is complete.
- During a SWRST, access to registers/bits without SWRST are disallowed until
the SYNCBUSY.SWRST is cleared by hardware.
Value | Description |
---|
0 |
There is no ongoing Reset
operation. |
1 |
The Reset operation is
ongoing. |