56 Revision History
Revision J - 08/2023
This revision document is identical to the previous release.
Revision H - 06/2023
In addition to the changes listed in the following table, there were numerous typographical updates that were made throughout the document.
The following additions or updates were done during this revision:
Section | Description |
---|---|
PAC | |
SUPC | |
RTC |
|
DMAC |
|
PORT |
|
SERCOM USART |
|
TC |
|
TRNG |
|
ADC |
|
AC |
|
Electrical Characteristics at 85℃ |
|
Schematic Checklist |
|
Revision G - 06/2021
In addition to the changes listed in the following table, there were numerous typographical updates that were made throughout the document.
Terminology in this document may not match with the contents of the current revision of the device errata or other Microchip documentation and collateral. If there are any questions or concerns regarding terminology, contact a Microchip support or sales representative.
The following additions or updates were done during this revision:
Section | Description |
---|---|
General |
|
Features | Added new information for PWM Modes using TC peripherals. |
Analog Peripherals Considerations | Updated the note for Caution, and the Analog Signal Components Interconnections Diagram. |
Memories |
|
SAM L11 Specific Security Features | |
Clock System |
|
MCLK |
|
FREQM |
|
PM |
|
OSCCTRL |
|
OSC32KCTRL |
|
RTC | Updated the following registers with new notes: |
DMAC | Updated the following registers with new bit alignment values: |
PORT | Updated the figure in the Functional Description |
EVSYS |
|
SERCOM | Updated I/O Lines with new text |
SERCOM USART | |
SERCOM SPI | |
SERCOM I2C | |
TC |
|
CCL | Updated Truth Table Inputs Selection with a new figure for Linked Lut Input Selection |
ADC | |
AC | Updated the Block Diagram to display DAC as DAC Output. |
DAC |
|
OPAMP | Updated the Signal Description with a new note. |
Schematic Checklist | Updated the Introduction with all new content and a caution note for a noisy environment |
Revision F - 06/2020
In addition to the changes listed in the following table, there were numerous typographical updates that were made throughout the document.
The following additions or updates were done during this revision:
Section | Description |
---|---|
Features |
|
Configuration Summary | Added a new note to Table 1-1, SAM L10/L11 Device-Specific Features |
Pinout |
|
Memories |
|
SAM L11 Specific Security Features |
|
Boot ROM |
|
DSU |
|
MCLK | Updated the offset for the CPUDIV register |
FREQM | Updated the Block Diagram and changed CLK_REF_MUX to CLK_REF |
DMAC | |
NVMCTRL | Updated the Silent Access section with new text and table |
TRAM |
|
SERCOM |
|
SERCOM I2C | Updated the Signal Description with a new note and Pinout tables |
TC |
|
TRNG | Updated the DATA register with a new register property |
ADC |
|
OPAMP | Added in a new topic, Reference Buffer (REFBUF) |
Electrical Characteristics at 85℃ |
|
Electrical Characteristics at 125℃ | Removed the last Equation in Analog-to-Digital Converter (ADC) Characteristics |
AEC-Q100 Grade Electrical Characteristics |
|
Revision E - 08/2019
The following additions or updates were done during this revision:
Section | Description |
---|---|
Features | Added the AEC-Q100 qualifications. |
Multiplexed Signals | Corrected typographical errors for note designations in the Pinout Multiplexing Table. |
Peripherals Configuration Summary | Corrected typographical errors in the table. |
Electrical Specifications at 85°C |
|
Electrical Specifications at 125°C |
|
AEC-Q100 Electrical Specifications | This section is newly added for this release. |
50.2 Package Drawings | 50.2.3 24-pin VQFN with Stepped Wettable Flanks (AEC-Q100 Grade 1) and 50.2.5 32-pin VQFN with Stepped Wettable Flanks (AEC-Q100 Grade 1) |
Rev D - 04/2019
Section | Updates |
---|---|
Features |
|
Ordering Information |
|
Memories |
|
Processor and Architecture |
|
Peripherals Configuration Summary |
|
SAM L11 Specific Security Features |
|
Peripheral Access Controller | |
GCLK |
|
MCLK |
|
FREQM |
|
PM |
|
OSCCTRL |
|
OSC32KCTRL |
|
SUPC |
|
WDT |
|
RTC |
|
DMAC | |
EIC | |
NVMCTRL |
|
TRAM |
|
PORT - I/O Pin Controller |
|
EVSYS |
|
SERCOM |
|
SERCOM - USART |
|
SERCOM - SPI | |
SERCOM I2C |
|
TC |
|
TRNG |
|
CCL | |
ADC | |
AC | |
DAC |
|
Rev C - 02/2019
Section | Updates |
---|---|
Configuration Summary | Updated SAML10/L11 Family Features |
Oscillators Pinout | Updated XOSC32 Jitter Minimization |
Memories |
|
13.1 Features |
|
Boot ROM |
|
Device Service Unit (DSU) | Updated STATUSB Register |
Power Manager (PM) |
|
Oscillators Controller (OSCCTRL) |
|
32KHz Oscillators Controller (OSC32KCTRL) | Updated the ULP32KSW bit in the OSCULP32K Register |
Supply Controller (SUPC) | Corrected erroneous text and added a note to Low Power VREF in Active Mode |
Real Time Counter (RTC) |
|
Direct Memory Access Controller (DMAC) | |
External Interrupt Controller (EIC) | |
Nonvolatile Memory Controller (NVMCTRL) |
|
TrustRAM (TRAM) | |
I/O Pin Controller (PORT) | |
Event System (EVSYS) |
|
SERCOM USART | |
SERCOM I2C | |
Timer/Counter (TC) |
|
Configurable Custom Logic (CCL) |
|
Analog-to-Digital Converter (ADC) |
|
Analog Comparators (AC) |
|
Digital-to-Analog Converter (DAC) |
|
Operational Amplifier Controller (OPAMP) |
|
Electrical Characteristics |
|
Electrical Characteristics at 125°C |
|
Schematic Checklist |
|
Appendix A | New Section for Migrating From SAM L21 to SAM L10/L11 (32-pin Package) |
Appendix B | New Section for Migrating From SAM D20/D21 to SAM L10/L11 (32-pin Package) |
Rev B - 06/2018
Added new documentation for Electrical Characteristics -125°C.
Rev A - 09/2017
This is the initial released version of the document.