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35.2 USART
Features
- Full-duplex operation
- Asynchronous (with clock
reconstruction) or synchronous operation
- Internal or external clock source for
asynchronous and synchronous operation
- Baud-rate generator
- Supports serial frames with 5, 6, 7, 8
or 9 data bits and 1 or 2 stop bits
- Odd or even parity generation and
parity check
- Selectable LSB- or MSB-first data
transfer
- Buffer overflow and frame error
detection
- Noise filtering, including false
start-bit detection and digital low-pass filter
- Collision detection
- Can operate in all sleep modes
- Operation at speeds up to half the
system clock for internally generated clocks
- Operation at speeds up to the system
clock for externally generated clocks
- RTS and CTS flow control
- IrDA modulation and demodulation up to
115.2kbps
- LIN client
support
- Auto-baud and break character
detection
- ISO 7816 T=0 or T=1 protocols for Smart Card interfacing
- RS485 Support
- Start-of-frame
detection
- Two- or Four-Level Receive Buffer
- Can work with DMA