42.7 Register Summary


Offset	Name	Bit Pos.	7	6	5	4	3	2	1	0
0x00	CTRLA	7:0							ENABLE	SWRST
0x01	CTRLB	7:0							START1	START0
0x02	EVCTRL	7:0				WINEO0			COMPEO1	COMPEO0
0x02	EVCTRL	15:8			INVEI1	INVEI0			COMPEI1	COMPEI0
0x04	INTENCLR	7:0				WIN0			COMP1	COMP0
0x05	INTENSET	7:0				WIN0			COMP1	COMP0
0x06	INTFLAG	7:0				WIN0			COMP1	COMP0
0x07	STATUSA	7:0			WSTATE0[1:0]				STATE1	STATE0
0x08	STATUSB	7:0							READY1	READY0
0x09	DBGCTRL	7:0								DBGRUN
0x0A	WINCTRL	7:0						WINTSEL0[1:0]		WEN0
0x0B	Reserved
0x0C	SCALER0	7:0			VALUE[5:0]
0x0D	SCALER1	7:0			VALUE[5:0]
0x0E ... 0x0F	Reserved
0x10	COMPCTRL0	7:0		RUNSTDBY		INTSEL[1:0]		SINGLE	ENABLE
		15:8	SWAP	MUXPOS[2:0]				MUXNEG[2:0]
		23:16			HYST[1:0]		HYSTEN		SPEED[1:0]
		31:24			OUT[1:0]			FLEN[2:0]
0x14	COMPCTRL1	7:0		RUNSTDBY		INTSEL[1:0]		SINGLE	ENABLE
		15:8	SWAP	MUXPOS[2:0]				MUXNEG[2:0]
		23:16			HYST[1:0]		HYSTEN		SPEED[1:0]
		31:24			OUT[1:0]			FLEN[2:0]
0x18 ... 0x1F	Reserved
0x20	SYNCBUSY	7:0				COMPCTRL1	COMPCTRL0	WINCTRL	ENABLE	SWRST
		15:8
		23:16
		31:24