18.4 Signal Description
| Signal Name | Type | Description |
|---|---|---|
| GCLK_IO[4:0] | Digital I/O |
Clock source for Generators when input Generic Clock signal when output |
Note: One signal can be mapped on several pins.
| Signal Name | Type | Description |
|---|---|---|
| GCLK_IO[4:0] | Digital I/O |
Clock source for Generators when input Generic Clock signal when output |
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.