17.5 List of Input/Output Macros
| Flash Memory Block | CLKDIVDLY1 |
| Analog System Builder | NGMUX |
| Voltage Regulator and Power Supply Monitor (VRPSM) | BIBUF |
| CLKBIBUF | CLKBUF |
| INBUF | OUTBUF |
| TRIBUFF | INBUF_X |
| BIBUF_X | CLKBUF_X |
| OUTBUF_X | TRIBUFF_X |
| INBUF_LVDS | INBUF_LVPECL |
| CLKBUF_LVDS | CLKBUF_LVPECL |
| OUTBUF_LVDS | OUTBUF_LVPECL |
| BIBUF_LVDS | TRIBUFF_LVDS |
| SIMBUF | DDR_REG |
| DDR_OUT | PLL for ProASIC3 / IGLOO |
| PLL for Fusion | DYNCCC for IGLOO and ProASIC3 |
| FAB_CCC | FAB_CCC_DYN |
| PLLINT | UJTAG |
| UFROM | UFROMH |
| ULSICC | RCOSC |
| XTLOSC | CLKSRC |
| CLKDLY | CLKDIVDLY |