m = 0 | Reserved | Reserved | Reserved |
m = 1 | PORT EV0 | Event 0 | Asynchronous path only |
m = 2 | PORT EV1 | Event 1 | Asynchronous path only |
m = 3 | PORT EV2 | Event 2 | Asynchronous path only |
m = 4 | PORT EV3 | Event 3 | Asynchronous path only |
m = 5 | DMAC CH0 | Channel 0 | Asynchronous, synchronous, and resynchronized paths |
m = 6 | DMAC CH1 | Channel 1 | Asynchronous, synchronous, and resynchronized paths |
m = 7 | DMAC CH2 | Channel 2 | Asynchronous, synchronous, and resynchronized paths |
m = 8 | DMAC CH3 | Channel 3 | Asynchronous, synchronous, and resynchronized paths |
m = 9 | TCC0 EV0 | - | Asynchronous, synchronous, and resynchronized paths |
m = 10 | TCC0 EV1 | - | Asynchronous, synchronous, and resynchronized paths |
m = 11 | TCC0 MC0 | Match/Capture 0 | Asynchronous, synchronous, and resynchronized paths |
m = 12 | TCC0 MC1 | Match/Capture 1 | Asynchronous, synchronous, and resynchronized paths |
m = 13 | TCC0 MC2 | Match/Capture 2 | Asynchronous, synchronous, and resynchronized paths |
m = 14 | TCC0 MC3 | Match/Capture 3 | Asynchronous, synchronous, and resynchronized paths |
m = 15 | TCC1 EV0 | - | Asynchronous, synchronous, and resynchronized paths |
m = 16 | TCC1 EV1 | - | Asynchronous, synchronous, and resynchronized paths |
m = 17 | TCC1 MC0 | Match/Capture 0 | Asynchronous, synchronous, and resynchronized paths |
m = 18 | TCC1 MC1 | Match/Capture 1 | Asynchronous, synchronous, and resynchronized paths |
m = 19 | TCC2 EV0 | - | Asynchronous, synchronous, and resynchronized paths |
m = 20 | TCC2 EV1 | - | Asynchronous, synchronous, and resynchronized paths |
m = 21 | TCC2 MC0 | Match/Capture 0 | Asynchronous, synchronous, and resynchronized paths |
m = 22 | TCC2 MC1 | Match/Capture 1 | Asynchronous path only |
m = 23 | TC0 EVU | - | Asynchronous path only |
m = 24 | TC1 EVU | - | Asynchronous path only |
m = 25 | TC2 EVU | - | Asynchronous path only |
m = 26 | TC3 EVU | - | Asynchronous path only |
m = 27 | TC4 EVU | - | Asynchronous path only |
m = 28 | ADC0 START | ADC start conversion | Asynchronous, synchronous, and resynchronized paths |
m = 29 | ADC0 FLUSH | Flush ADC | Asynchronous, synchronous, and resynchronized paths |
m = 30 | ADC1 START | ADC start conversion | Asynchronous, synchronous, and resynchronized paths |
m = 31 | ADC1 FLUSH | Flush ADC | Asynchronous, synchronous, and resynchronized paths |
m = 32 | AC SOC0 | Start comparator 0 | Asynchronous path only |
m = 33 | AC SOC1 | Start comparator 1 | Asynchronous path only |
m = 34 | AC SOC2 | Start comparator 2 | Asynchronous path only |
m = 35 | AC SOC3 | Start comparator 3 | Asynchronous path only |
m = 36 | DAC START | DAC start conversion | Asynchronous path only |
m = 37 | PTC STCONV | PTC start conversion | Asynchronous path only |
m = 38 | CCL LUTIN 0 | CCL input | Asynchronous path only |
m = 39 | CCL LUTIN 1 | CCL input | Asynchronous path only |
m = 40 | CCL LUTIN 2 | CCL input | Asynchronous path only |
m = 41 | CCL LUTIN 3 | CCL input | Asynchronous path only |
m = 42 | Reserved | - | Reserved |
m = 43 | MTB START | Micro Trace Buffer Start | Asynchronous path only |
m = 44 | MTB STOP | Micro Trace Buffer Stop | Asynchronous path only |
m = 45 | TC5 EVU | - | Asynchronous path only |
m = 46 | TC6 EVU | - | Asynchronous path only |
m = 47 | TC7 EVU | - | Asynchronous path only |
m = 48 | PDEC EVU0 | - | Asynchronous path only |
m = 49 | PDEC EVU1 | - | Asynchronous path only |
m = 50 | PDEC EVU2 | - | Asynchronous path only |
others | Reserved | - | Reserved |