28.6 Register Summary

Refer to the Registers Description section for more details on register properties and access permissions.


Offset	Name	Bit Pos.	7	6	5	4	3	2	1	0
0x00	CTRLA	7:0								SWRST
0x01 ... 0x0B	Reserved
0x0C	CHSTATUS	31:24					CHBUSY11	CHBUSY10	CHBUSY9	CHBUSY8
		23:16	CHBUSY7	CHBUSY6	CHBUSY5	CHBUSY4	CHBUSY3	CHBUSY2	CHBUSY1	CHBUSY0
		15:8					USRRDY11	USRRDY10	USRRDY9	USRRDY8
		7:0	USRRDY7	USRRDY6	USRRDY5	USRRDY4	USRRDY3	USRRDY2	USRRDY1	USRRDY0
0x10	INTENCLR	31:24					EVD11	EVD10	EVD9	EVD8
		23:16	EVD7	EVD6	EVD5	EVD4	EVD3	EVD2	EVD1	EVD0
		15:8					OVR11	OVR10	OVR9	OVR8
		7:0	OVR7	OVR6	OVR5	OVR4	OVR3	OVR2	OVR1	OVR0
0x14	INTENSET	31:24					EVD11	EVD10	EVD9	EVD8
		23:16	EVD7	EVD6	EVD5	EVD4	EVD3	EVD2	EVD1	EVD0
		15:8					OVR11	OVR10	OVR9	OVR8
		7:0	OVR7	OVR6	OVR5	OVR4	OVR3	OVR2	OVR1	OVR0
0x18	INTFLAG	31:24					EVD11	EVD10	EVD9	EVD8
		23:16	EVD7	EVD6	EVD5	EVD4	EVD3	EVD2	EVD1	EVD0
		15:8					OVR11	OVR10	OVR9	OVR8
		7:0	OVR7	OVR6	OVR5	OVR4	OVR3	OVR2	OVR1	OVR0
0x1C	SWEVT	31:24
		23:16
		15:8					CHANNEL11	CHANNEL10	CHANNEL9	CHANNEL8
		7:0	CHANNEL7	CHANNEL6	CHANNEL5	CHANNEL4	CHANNEL3	CHANNEL2	CHANNEL1	CHANNEL0
0x20	CHANNEL0	31:24
		23:16
		15:8	ONDEMAND	RUNSTDBY			EDGSEL[1:0]		PATH[1:0]
		7:0		EVGEN[6:0]
...
0x4C	CHANNEL11	31:24
		23:16
		15:8	ONDEMAND	RUNSTDBY			EDGSEL[1:0]		PATH[1:0]
		7:0		EVGEN[6:0]
0x50 ... 0x7F	Reserved
0x80	USER0	31:24
		23:16
		15:8
		7:0	CHANNEL[7:0]
...
0x0148	USER50	31:24
		23:16
		15:8
		7:0	CHANNEL[7:0]

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