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32-bit Arm Cortex-M0+ with 5V Support MCU
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PIC32CM1216JH01032
PIC32CM2532JH00032
PIC32CM2532JH00048
PIC32CM2532JH00064
PIC32CM2532JH00100
PIC32CM2532JH01032
PIC32CM2532JH01048
PIC32CM2532JH01064
PIC32CM2532JH01100
PIC32CM5164JH00032
PIC32CM5164JH00048
PIC32CM5164JH00064
PIC32CM5164JH00100
PIC32CM5164JH01032
PIC32CM5164JH01048
PIC32CM5164JH01064
PIC32CM5164JH01100
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33
Control Area Network (CAN)
33.6
Functional Description
33.6.2
Operating Modes
512-KB Flash, 64-KB SRAM with CAN-FD, Enhanced PTC and Advanced Analog
1
Configuration Summary
2
Ordering Information
3
Block Diagram
4
Pinout and Packaging
5
Signal Descriptions List
6
Power Supplies
7
Device Start-Up
8
Product Mapping
9
Peripherals
10
Memories
11
Processor and Architecture
12
Peripheral Access Controller (PAC)
13
Device Service Unit (DSU)
14
Generic Clock Controller (GCLK)
15
Main Clock (MCLK)
16
32.768 kHz Oscillators Controller (OSC32KCTRL)
17
Oscillators Controller (OSCCTRL)
18
Supply Controller (SUPC)
19
Power Manager (PM)
20
Reset Controller (RSTC)
21
Divide and Square Root Accelerator (DIVAS)
22
Watchdog Timer (WDT)
23
Real-Time Counter (RTC)
24
Direct Memory Access Controller (DMAC)
25
External Interrupt Controller (EIC)
26
Non-volatile Memory Controller (NVMCTRL)
27
I/O Pin Controller (PORT)
28
Event System (EVSYS)
29
Serial Communication Interface (SERCOM)
30
SERCOM Synchronous and Asynchronous Receiver and Transmitter (SERCOM USART)
31
SERCOM Serial Peripheral Interface (SERCOM SPI)
32
SERCOM Inter-Integrated Circuit (SERCOM I
2
C)
33
Control Area Network (CAN)
33.1
Overview
33.2
Features
33.3
Block Diagram
33.4
Signal Description
33.5
Peripheral Dependencies
33.6
Functional Description
33.6.1
Principle of Operation
33.6.2
Operating Modes
33.6.2.1
Software Initialization
33.6.2.2
Normal Operation
33.6.2.3
CAN FD Operation
33.6.2.4
Transceiver Delay Compensation
33.6.2.5
Restricted Operation Mode
33.6.2.6
Bus Monitoring Mode
33.6.2.7
Disabled Automatic Retransmission
33.6.2.8
Test Modes
33.6.3
Timestamp Generation
33.6.4
Timeout Counter
33.6.5
Rx Handling
33.6.6
Tx Handling
33.6.7
FIFO Acknowledge Handling
33.6.8
Interrupts
33.6.9
Sleep Mode Operation
33.6.10
Synchronization
33.7
Register Summary
33.8
Message RAM
34
Timer/Counter (TC)
35
Timer Counter for Control Applications (TCC)
36
Configurable Custom Logic (CCL)
37
Analog-to-Digital Converter (ADC)
38
Analog Comparators (AC)
39
Digital-to-Analog Converter (DAC)
40
Peripheral Touch Controller (PTC)
41
Frequency Meter (FREQM)
42
Position Decoder (PDEC)
43
Integrity Check Monitor (ICM)
44
SRAM Memory Built-In Self-Test Module (SMBIST)
45
SRAM Controller (MCRAMC)
46
Electrical Characteristics at 85°C
47
Electrical Characteristics at 125°C
48
Packaging Information
49
Schematic Checklist
50
Appendix
51
Revision History
The Microchip Website
Product Change Notification Service
Customer Support
Product Identification System
Microchip Devices Code Protection Feature
Legal Notice
Trademarks
Quality Management System
Worldwide Sales and Service
33.6.2 Operating Modes
