15.6.3 Interrupt Flag Status and Clear
| Name: | INTFLAG |
| Offset: | 0x03 |
| Reset: | 0x01 |
| Property: | – |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CKRDY | |||||||||
| Access | R/W | ||||||||
| Reset | 1 |
Bit 0 – CKRDY Clock Ready
This flag is cleared by writing a '1' to the flag.
This flag is set when the synchronous CPU, APBx, and AHBx clocks have frequencies as indicated in the CPUDIV registers and will generate an interrupt request if INTENSET.CKRDY is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit clears the Clock Ready interrupt flag.