33.8.5 Standard Message ID Filter Element
Up to 128 filter elements can be configured for 11-bit standard IDs. When accessing a Standard Message ID Filter element, its address is the Filter List Standard Start Address SIDFC.FLSSA plus the index of the filter element (0 ... 127).
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| S0 | SFT [1:0] | SFEC [2:0] | SFID1[10:0] | SFID2[10:0] | ||||||||||||||||||||||||||||
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Bits 31:30 - SFT[1:0]: Standard Filter Type
This field defines the standard filter type.
Table 33-13. Standard Filter Type Value Name Description 0x0 RANGE Range filter from SFID1 to SFID2 (SFID2 >= SFID1) 0x1 DUAL Dual ID filter for SFID1 or SFID2 0x2 CLASSIC Classic filter: SFID1 = filter, SFID2 = mask 0x3 RES Reserved -
Bits 29:27 - SFEC[2:0]: Standard Filter Element Configuration
All enabled filter elements are used for acceptance filtering of standard frames. Acceptance filtering stops at the first matching enabled filter element or when the end of the filter list is reached. If SFEC = “100”, “101”, or “110” a match sets interrupt flag IR.HPM and, if enabled, an interrupt is generated. In this case register HPMS is updated with the status of the priority match.
Table 33-14. Standard Filter Element Configuration Value Name Description 0x0 DISABLE Disable filter element 0x1 STF0M Store in Rx FIFO 0 if filter matches 0x2 STF1M Store in Rx FIFO 1 if filter matches 0x3 REJECT Reject ID if filter matches 0x4 PRIORITY Set priority if filter matches. 0x5 PRIF0M Set priority and store in FIFO 0 if filter matches. 0x6 PRIF1M Set priority and store in FIFO 1 if filter matches. 0x7 STRXBUF Store into Rx Buffer or as debug message, configuration of SFT[1:0] ignored. -
Bits 26:16 - SFID1[10:0]: Standard Filter ID 1
First ID of standard ID filter element.
When filtering for Rx Buffers or for debug messages this field defines the ID of a standard mesage to be stored. The received identifiers must match exactly, no masking mechanism is used.
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Bits 15:11 - Reserved
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Bits 10:0 - SFID2[10:0]: Standard Filter ID 2
This bit field has a different meaning depending on the configuration of SFEC.
- SFEC = “001” ... “110”: Second ID of standard ID filter element.
- SFEC = “111”: Filter for Rx Buffers or for debug messages.
SFID2[10:9] decides whether the received message is stored into an Rx Buffer or treated as message A, B, or C of the debug message sequence. 00 = Store message into an Rx Buffer 01 = Debug Message A 10 = Debug Message B 11 = Debug Message C
SFID2[8:6] is used to control the filter event pins at the Extension Interface. A ‘1’ at the respective bit position enables generation of a pulse at the related filter event pin with the duration of one CLK_CAN_APB period in case the filter matches.
SFID2[5:0] defines the offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching message.